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  ? semiconductor components industries, llc, 2011 august, 2010 ? rev. 1 1 publication order number: ncp373/d ncp373 overvoltage up to +30 v and down to -30 v with load switch function ncp373 is an over ? voltage and over ? current protection device. from in to vbus , the part acts as a load switch protection, with programmable current regulation. the current protection is externally adjustable, up to 400 ma or 1300 ma, depending on selected version. additional voltage protection is available, from vbus to in. due to built ? in low r ds(on) nmos fet, the host system is protected against positive and negative voltages up to 28 v. the embedded over ? current and over ? voltage protection allow the device to sustain extreme conditions from short circuit on usb connector, or defective wa or usb port. because to the ncp373 using internal nmos, the system cost and the pcb area of the application board are minimized. ncp373 provides a negative going flag (flag ) output, which alerts the system that a fault has occurred. features ? adjustable over ? current ? over ? voltage protection up to 28 v and down to ? 28 v ? logic pins en and dir ? thermal shutdown ? on ? chip low r ds(on) nmos transistors ? over ? voltage lockout (ovlo) ? soft ? start ? real shutdown mode ? alert flag output ? compliance to iec61000 ? 4 ? 2 (level 4) 8 kv (contact) 15 kv (air) ? esd ratings: machine model = b human body model = 2 ? 12 leads llga 3x3 mm package ? these are pb ? free devices typical applications ? usb ports ? tablets ? set top box ? cell phones marking diagram a = assembly location l = wafer lot y = year w = work week  = pb ? free package http://onsemi.com 12 pin llga mu suffix case 513ak nc in flag dir en ilim vbus vbus gnd res1 res2 res3 ncp373 (top view) 12 11 10 9 8 7 1 2 3 4 5 6 xxxx alyw   (note: microdot may be in either location) 1 see detailed ordering, marking and shipping information in the package dimensions section on page 9 of this data sheet. ordering information
ncp373 http://onsemi.com 2 ncp373 vbus vbus gnd res res ilim res in ldo 3.3v in 1 gnd 2 out 3 power supply in usb host controller en status crtl_in[x:0] data_in[x:0] crtl_out[x:0] data_out[x:0] vcc gnd sys usb transceiver vcc 1 d+ 2 d ? 3 gnd 4 vbus(sense) 5 gnd 10 data[x:0] 11 crtl[x:0] 12 usb transceiver vcc 1 d+ 2 d ? 3 gnd 4 vbus(sense) 5 gnd 10 data[x:0] 11 crtl[x:0] 12 usb port vbus d+ d ? gnd usb port vbus d+ d ? gnd upstream usb port downstream usb port 120  f 1  f 4.7  f 1  f system figure 1. typical host application circuit flag dir rev d+ d ? ctr ctr usb port vbus d+ d ? gnd wall adapter vbus d+ d ? gnd ldo phy (transceiver) rlimit 1 10k 1  f1 4.7  f1 gnd li+battery cccv charger system wall adapter vbus d ? d+ ncp373 vbus vbus gnd res res ilim /en res /dir /flag in figure 2. typical portable application circuit flag dir rev flag dir rev
ncp373 http://onsemi.com 3 functional block diagram flag? pin10 in? pin11 uvlo ovlo charge pump vbus? pins1and2 en block /dir? pin9 ldo vref 5.5v gate 2 driver : negative voltage and reverse current protection gate 1 driver : positve voltage core negative voltage protection control logic and timer thermal shutdown ocp block trim res 1? pin4 res 2 ? pin5 res 3 ? pin6 ilim? pin7 /en? pin8 gnd? pin3 not connected ? pin10 exposed pad ? pad 1 figure 3. functional block diagram pin function description pin pin name type description 1,2 vbus power vbus voltage pins: must be hardwired together on the pcb. these pins are connected to the vbus connector, and are protected against positive and negative overvoltage events. a 1  f low esr ceramic capacitor, or larger, must be connected between these pins and gnd. 3 gnd power ground 4 res1 input reserved pin. must be connected to gnd potential and used for ic test. 5 res2 input reserved pin. must be connected to gnd potential and used for ic test. 6 res3 input reserved pin. must be connected to gnd potential and used for ic test. 7 ilim output current limit pin. this pin provides the reference, based on the internal band ? gap voltage reference, to limit the over current, across internal n ? mosfet. a 0.1% tolerance resistor shall be used to get the highest accuracy of the over current limit.
ncp373 http://onsemi.com 4 pin function description pin description type pin name 8 en input enable pin. in combination with dir , the internal nmoses are turned on if battery is applied on the in pins. (see logic table) in enable mode, the internal over ? current protection is activated from in to vbus. when enable mode is disabled, the ncp373 current consumption, into in pin, is drastically decreased to limit current leakage of the self powered devices. 9 dir input direct mode pin. this pin can be used, in combination with enable pin, for the front end protection applications like wireless devices. in this case, the part can be used as +/ ? ovp only. see logic table. 10 flag output fault indication pin. this pin allows an external system to detect fault condition. the flag pin goes low when input voltage exceeds ovlo threshold or drops below uvlo threshold (charging mode), charge current from in to vbus exceeds current limit or internal temperature exceeds thermal shutdown limit. since the flag pin is open drain functionality, an external pull up resistor to vbat must be added (10 k  minimum value). 11 in power in pin. in front end application this pin is connected to cccv device input or pmic input. in host application, this pin is connected to upstream dcdc. this pin is used as power supply of the core and current from in to vbus is then limited to the external 12 nc na not internally connected. can be connected to any potential. 13 pad1 power drain connection of the back to back mosfet?s. this exposed pad mustn?t be connected to any other potential and must be used for thermal dissipation of the internal mosfets. maximum ratings rating symbol value unit minimum voltage (vbus to gnd) vmin vbus ? 30 v minimum voltage (all others to gnd) v min ? 0.3 v maximum voltage (vbus to gnd) vmax vbus 30 v maximum voltage (in to gnd) vmax in 10 v maximum voltage (all others to gnd) v max 7 v maximum dc current ncp373mu04txg charge mode vbus mode NCP373MU13TXG charge mode vbus mode i in 500 500 2 1.5 ma ma a a thermal resistance, junction ? to ? air, (note 1) r  ja 200 c/w operating ambient temperature range t a ? 40 to +85 c storage temperature range t stg ? 65 to +150 c junction operating temperature t j 150 c esd withstand voltage (iec 61000 ? 4 ? 2) human body model (hbm), model = 2, (note 2) machine model (mm) model = b, (note 3) vesd 15kv air, 8kv contact 2000v 200v kv v v moisture sensitivity msl level 1 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. the r  ja is highly dependent on the pcb heat sink area (connected to pad1). see pcb recommendation paragraph. 2. human body model, 100 pf discharged through a 1.5 k  resistor following specification jesd22/a114. 3. machine model, 200 pf discharged through all pins following specification jesd22/a115.
ncp373 http://onsemi.com 5 electrical characteristics min / max limits values ( ? 40 c < t a < +85 c) and in = +5 v (unless otherwise noted). typical values are t a = +25 c characteristics symbols conditions min typ max unit input voltage range v in 2.5 5.5 v vbus voltage range vvbus all modes ? 28 28 v all modes in = 5 v ? 23 under voltage lockout threshold uvlo vbus falls down uvlo threshold disable, charge mode and enhance modes 2.6 2.7 2.8 v under voltage lockout hysteresis uvlo hyst vbus rises up uvlo threshold + uvlo hyst 45 60 75 mv over voltage lockout threshold ovlo vbus rises up ovlo threshold 5.6 5.77 5.9 v over voltage lockout hysteresis ovlo hyst vbus falls down to ovlo ? ovlo hyst 45 65 90 mv vbus versus in resistance in versus vbus resistance r dson vbus = 5 v, or in = 5 v direct mode, load connected to v out ncp373mu04txg NCP373MU13TXG 200 130 300 220 m  quiescent current idd in no load. vbus mode, vin= 5 v 200 315  a standby current idd std no load, in = 5 v. standby mode, no vbus 0.02 1  a current limit i ocp in = 5 v, load on vbus, vbus mode r ilim = 0  ncp373mu04txg NCP373MU13TXG 330 1100 400 1300 470 1500 ma flag output low voltage vol flag fault mode sink 1 ma on flag pin 400 mv flag leakage current flag leak flag level = 5.5 v 1 na dir voltage high v ih 1.2 v dir voltage low vol 0.4 v dir leakage current dir leak dir = 5.5 v 300 na en voltage high v ih 1.2 v en voltage low v ol 0.4 v en leakage current en leak en = 5.5 v 300 na thermal shutdown temperature t sd 150 c thermal shutdown hysteresis t sdhyst 30 c timings vbus mode start up delay to n vbus in 2.5 v, from en = 1.2 to 0.4 to vbus 0.3 v vbus mode 0.6 1.2 1.8 ms flag going up delay tstart vbus from in 0.3 v flag = 1.2 v, vbus mode 0.6 1.2 1.8 ms rearming delay t rrd in > .2.5 v, r in = 1  vbus mode, after fault 15 30 45 ms over current regulation time t reg in > 2.6, vbus > 0.3 v vbus mode 0.5 1.2 1.8 ms ocp delay time t ocp from i vbus > i lim , 1 a/1  s 5  s note: electrical parameters are guaranteed by correlation across the full range of temperature.
ncp373 http://onsemi.com 6 electrical characteristics min / max limits values ( ? 40 c < t a < +85 c) and in = +5 v (unless otherwise noted). typical values are t a = +25 c characteristics unit max typ min conditions symbols timings vbus mode vbus disable time t vbusdis from en = 0.4 v to 1.2 v, to vbus < 0.3 v. in = 5 v 2.5  s turn off delay t off from in > ovlo to vbus 0.3 v vin increasing from 5 v to 8 v at 3 v/  s 1.5 5  s charging mode start up delay t on from vbus > uvlo to in = 0.3 v , charging mode 15 30 45 ms flag going up delay t start from in>0.3v to flag = 1.2 v 15 30 45 ms turn off delay t off from vbus > ovlo to in 0.3 v vin increasing from 5 v to 8v at 3v/  s 1.5 5  s alert delay t stop from vbus > ovlo to flag 0.4 v see figures 3and 9 vin increasing from 5 v to 8 v at 3 v/  s 1.5  s disable time t dis en = 1.2 v, from dir = 0.4 to 1.2 v to in 0.3 v 2.5  s note: electrical parameters are guaranteed by correlation across the full range of temperature. typical operating characteristics operation the ncp373acts as an over ? voltage in charge mode, when wall adapter or vbus cable is connected to vbus pin of the device. the downstream system (transceiver, cccv charger..) are protected up to +30 v if charging voltage exceeds ovlo threshold (5.77 v). thanks to a back to back architecture, the vbus pin is also protected against reverse polarity connection, coming from wrong usb cables. this negative protection acts down to ? 30 v. in disable mode (  = 1, dir = 1), there is no current consumption on in pin and msofets are turned off (vbus cable disconnected) the ncp373 provides over ? current from in to vbus by selecting vbus mode. to active vbus mode (usb port on), the  pin must be tied low. in this case, mosfet are turned on and current is measure in the branch. if the sinking current on the vbus pin is above the programmed current on ilim pin (can be programmed up to 400 ma), the vbus current is regulated around iocp during treg time. if the overload is present at the end of this timer, the mosfet are turned off and automatic rearming cycle is activated. with t reg /t rrd cycle until overload is present. over ? voltage lockout (ovlo) to protect the connected system on in pins, from external over ? voltage coming from usb connector or wall adapter, through vbus pin , the device has a built ? in over ? voltage lock out (ovlo) circuit. during over ? voltage condition, the output remains disabled until the input voltage exceeds ovlo (vbus pin). the ovlo comparator is available in all modes. additional ovlo thresholds ranging from ovlo can be manufactured. please contact your on semiconductor representative for further information. flag output is tied to low until vin is higher than ovlo. this circuit has a built ? in hysteresis to provide noise immunity to transient conditions . over ? current protection (ocp) this device integrates over current protection function, from in to vbus port (400 ma version and 1300 ma version). that means the current across the internal nmos is regulated when the value, set by external r lim resistor, exceeds i limit during an internal timer. an internal resistor is placed in series with the pin allowing to have a maximum ocp value when i lim pin is directly connected to gnd. by adding external resistors in series with i lim and gnd, the ocp value is decreased. the rlim tolerance is important to keep a good accuracy. so a value between 0.1% and 1% won?t have an impact on the ocp accuracy. nevertheless, the higher r lim value, the lower over current protection accuracy. indeed, the current is measured by a voltage comparator on a serial resistance. if this voltage drop comes very small, the offset of the internal comparator will have an impact on
ncp373 http://onsemi.com 7 the accuracy. so a division by more than three times with rlim will degrade drastically the overcurrent accuracy. the current limit calculation formula for the ncp373mu04txg is: r lim04   11521 i ocp   29035  the current limit calculation formula for the NCP373MU13TXG is: r lim13   37717 i ocp   29035  during over current event, nmoses are opened and flag output is tied to low, allowing the  controller to take into account the fault event and then disable reverse charge path. vbus mode to access to the vbus mode, dir pin must be tied to high (>1.2) and  must be tied from high to low (< 0.4 v). in that case, the core of the ncp373 will be supplied by the in, with a 2.5 v minimum voltage and 5.5 v maximum voltage. in this state, ocp, ovlo and thermal modes are available. figure 4. over current protection sequence {} {} t en irev flag vbus in id transceiver ton ilim dir start t reg t rrd over current in vbus in vbus mode, flag pin remains available, allowing the  controller to have a status regarding over ? voltage condition, over ? current condition or thermal shutdown condition.
ncp373 http://onsemi.com 8 en fl ag in vbus transciever t on downstream vbus connection battery output transciever dir figure 5. flag status in vbus mode logic inputs to enable charge operation (charge mode), the dir pin shall be forced to low and  to high. a high level on the dir pin disconnects in pin from vbus pin. dir does not overdrive an ovlo or uvlo fault (flag status is still available). table 1. table selection of charge modes dir en mode protection ovp @ vbus (+28 v, ? 28 v, ovlo 5.77 v) ocp (in to vbus) ocp (vbus to in) 0 0 na na na na 0 1 charge yes na na 1 0 vbus yes yes na 1 1 disable yes (out off) na na negative voltage and reverse current the device protects the system connected on in pin from negative voltage occurring on vbus pin, down to ? 28 v. when a negative voltage occurs, the in pins are disconnected from vbus pins. this negative protection is available in all modes thermal shutdown protection in case of internal overheating, the integrated thermal shutdown protection allows to open the internal mosfet in order to instantaneously decrease the device temperature. the thermal threshold has been set at 150 c. flag is then tied to low to inform the mcu. as the thermal hysteresis is 30 c, the mosfet will be closed as soon the device temperature falls down to 120 c. if the fault event is still present, the temperature increase one more time and engages the thermal shutdown one more time until fault event disappeared.
ncp373 http://onsemi.com 9 power curve with pcb cu thk 1 oz  ja curve with pcb cu thk 2 oz  ja curve with pcb cu thk 1 oz copper heat spread area (mm 2 ) maximum  ta ( c/w) 0 50 100 150 200 250 0 100 200 300 400 500 600 700 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 power curve with pcb cu thk 2 oz total power into package (w) figure 6. copper heat spread area esd tests the ncp373 conforms to the iec61000 ? 4 ? 2, level 4 on the input pin. a 1  f (i.e murata grm188r61e105ka12d) must be placed close to the in pins. if the iec61000 ? 4 ? 2 is not a requirement, a 100 nf/25 v must be placed between in and gnd. the above configuration supports 15 kv (air) and 8 kv (contact) at the input per iec61000 ? 4 ? 2 (level 4). please refer to figure 7 for the iec61000 ? 4 ? 2 electrostatic discharge waveform. figure 7. i peak = f(t)/iec61000 ? 4 ? 2 pcb recommendations the under pad1 of the ncp373 package shall be connected to an isolated pcb area to increase the heat transfer if necessary for an application standpoint. in any case, the pad1 shall be not connected to any other potential or gnd than the isolated extra copper surface. following figure shows copper area according to r  ja and allows the design of the transfer plane connected to pad1. ordering information device marking order current limit package shipping ? ncp373mu04txg ncai 400 ma llga12 3 x 3 mm (pb ? free) 3000 tape / reel NCP373MU13TXG nc13 1300 ma llga12 3 x 3 mm (pb ? free) 3000 tape / reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp373 http://onsemi.com 10 package dimensions llga12 3x3, 0.5p case 513ak ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. ??? ??? ??? a d e b c 0.15 pin one 2x reference 2x top view side view bottom view a l d2 e2 c c 0.15 c 0.10 c 0.08 12x a1 seating plane e 12x note 3 b 12x 0.10 c 0.05 c a b b dim min max millimeters a 0.50 0.60 a1 0.00 0.05 b 0.20 0.30 d 3.00 bsc d2 2.60 2.80 e 3.00 bsc e2 1.90 2.10 e 0.50 bsc k 0.20 ??? l 0.25 0.35 1 6 12 7 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 12x 0.43 3.30 0.50 pitch 2.05 0.50 2.75 1 k 12x dimensions: millimeters 0.30 11x on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp373/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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